The Ground Myth

A friend of mine told me years ago that there's no such thing as voltage. This was a real shock to me, because I had a voltmeter in the lab. He explained that Maxwell's equations, which are accepted as the basis for all electromagnetic (and therefore circuit) theory, include current, electric field, and magnetic field, but no voltage. In fact, “voltage” is a derived term shown in the equation below. It is the summation (integration) of the electric field over a distance.

Most PCB designers talk about things such as DC supply voltage or a signal voltage on traces. If I bring up the idea of current flow, they will accept it. Then we discuss how the return current always flows back to its source on ground.

The term “ground” is probably the most misunderstood and misused term in electrical engineering. I blame the universities. They start their electrical engineering instruction with DC circuits and then progress to AC circuits with resistors, inductors, and capacitors. But the ideas of parasitic and nonschematic effects are seldom discussed in classes. Usually, lab assignments are relatively low-frequency projects — probably designed to ensure parasitic effects aren't encountered.

We learn to read schematics with this magical return current path called ground. At low frequencies, the physical distance between the ground connections is electrically small. This concept of having all ground nodes connected at the same point is reasonable.

In the real world of high-speed circuit boards, the physical distance between ground node connections isn't electrically small, so the distance between the nodes becomes meaningful. Current must travel some distance to return to its starting point. This distance can add losses that make ground something else entirely.

For example, let's take a microstrip trace over a metal plane, but let's have a PCB stack up where the metal plane is assigned as 3.3 V (not ground). A ground plane will exist lower in the PCB stack. The schematic will indicate the return current path is ground, not 3.3 V. Unfortunately, the current does not read the schematic to see where the designer intended the current to flow. It will follow the path of least impedance. At frequencies higher than about 1 MHz, this means the path of least inductance. That path will nearly always have the smallest current loop size, so the current will flow on the 3.3 V plane, not the ground plane.

The image below shows the electric field lines for a microstrip. Where those field lines terminate, current will flow (into or out of the page). Even though the signal on the trace was driven relative to a ground plane (which is not shown) below the VCC plane, the field lines terminate on the VCC plane. The return current will always flow in the nearest plane, regardless of its schematic name.

Electric field lines for a microstrip.(Source: Hyperlynx)

Electric field lines for a microstrip.
(Source: Hyperlynx)

How does the return current get on a conductor that is not called for in the schematic? After all, we solder the ground pin on the IC to the ground plane, not the VCC plane. The image below shows that, even though the current driven down the signal trace goes into the capacitive load of the CMOS IC at the load end and to the ground pin, it migrates to the VCC conductor once the return current gets a little distance from the IC.

Zero-to-one transition current path for CMOS devices.

Zero-to-one transition current path for CMOS devices.

The actual migration path (or fuzzy return path) depends on the location of decoupling capacitors, the displacement current through the PCB dielectric, etc. The exact path will differ for each case, and it would require full wave analysis to predict the path accurately.

I am fond of saying ground is a place for potatoes and carrots.

When working with moderate- or high-speed PCBs, the concept of ground is unimportant. The return current path is the most important issue. Engineers always take great care to make sure the intentional signal path is connected as desired, but they seldom consider the return current path. Interruptions in the return current path are the most common cause of PCB-related EMC issues, both for immunity and for emissions. Many signal integrity issues can also be traced to poorly designed return current paths.

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14 comments on “The Ground Myth

  1. ernie.hanks
    November 14, 2013


    Great topic and convenient timing! Being one who's relatively new out of school I understand your claim that the term “ground” coming from the academic world; I was always taught ground is 0 Volts. That is until I suffered from my first painful groundloop when making low-noise measurements at work 3months ago; specifically trying to measure nA currents with mA currents also flowing on the same PCB.

    Do you have any experience simulating these ground noise problems? I've come up with a very interesting graduate project (as I'm currently finishing a MSEE while I work). I wish to simulate ground noise due either to dI/dT, return current path, or DC-losses due to the scenario of a PCB stackup and a PCB power/ground plane.

    My approach is pretty basic; imagine I have a circuit (op-amp, CMOS driver, etc.) that switches between GND and +5 V driving a simple Rload to ground (say 50Ohms). As PCB guys, we know that the GND and +5V connections are all made through a Via, and then to a PWR or GND plane. However, due to the layout of the board there is also an ADC (say 5V and 24-bits for nV levels of LSB resolution) who has its pins also conected to vias to GND and PWR.

    So the interesting simulation becomes moving around the ADC placement'sto measure what signal gets picked up on the ADC-ground plane connection; far away for low HF-noise coupling, but suffers from high DC V=IR drop.

    Currently my approach is to draw this structure in HFSS (a 3D field solver), extract S-parameters, and import as models into ADS.

  2. Davidled
    November 14, 2013

    I think that there are formulation between Vcc and Line area to avoid fuzzy return path area. Generally speaking, Vcc and decoupling CAP is located as close as possible. But I wonder there is some correlation between the voltage level (for example, 5 V, 3V and 0.7 V) and Transmission line regarding return path area. Of course CAP value is also considered.  

  3. samicksha
    November 15, 2013

    One of the major reason i find here is GPD due to electrical installation…

  4. eafpres
    November 15, 2013

    @Bruce–an interesting situation having one conductor of an RF transmission line at positive DC voltage.  However, odd as this sounds, it actually is very common.  For example, all high performance GPS antennas contain a low-noise amplifier to add 25dB or more of gain to the incoming signal.  The amplifiers are usually powered by putting 5V or 3V on the center conductor of the coaxial feed.  There are many other situaions in RF like this.  Many readers have probably used a “bias tee” to injet power into a coaxial line for a test setup.

    On the topic of the PCBs, when I was in the antenna business we helped customers figure out transmission line layouts to connect an RF section to the antennas.  In some cases it was preferable to create co-planar waveguide instead of microstrip line.  Generally we would make the outer “ground” conductors as a pad area that followed the line, and ask them to put lots of vias in to the “real” ground plane.  Since the fields in CPW are more confined, this often worked well.  It has the additional beneift that it is easier to design a matching network becuase you cap more easily put SMT components bridging across from the center conductor to the ground all in the same plane without additional interconnect.

  5. D Feucht
    November 17, 2013


    In answer ot your friend who claimed that “Maxwell's equations, … are accepted as the basis for all electromagnetic (and therefore circuit) theory”, I would add that they are also not the completion of fields theory. Some physicists think that electric and magnetic potentials are more real than the fields.

    There is still a concept of ground (0 V) in distributed-parameter circuits because even in them, currents flow in closed loops and somewhere in the loop(s) is a spatial point at which the electric potential is deemed to be 0 V. However, as you point out, one must be (spatially) careful in declaring such nodes in distributed-parameter circuits!

  6. etnapowers
    November 18, 2013

    The voltage is a function that in static case is the scalar function that  originates the electrostatic field:

    E =-grad V

    being E a vector and V a scalar function.


  7. etnapowers
    November 18, 2013

    Many times I have engineered devices having two different ground pins: the analogic and the power ground.

    In pcb traces, these path have to be separated but the potential has to be kept the same . The power ground has to dissipate an high pulsed current coming from power switches, and its potential can rise , hence the only chance to control the voltage is to force externally to a zero voltage the power ground pin, by checking the analog ground voltage, which acts as a feedback signal.

  8. etnapowers
    November 18, 2013

    When designing a PCB, a good strategy is to insulate two signal paths by surrounding the signals with ground planes. This will avoid cross talking and will provide a return path for the current.

  9. amrutah
    November 20, 2013

    @etnapowers: Yes as you mentioned when designing IC's we have different grounds for Analog section, Digital section and substrate base.  This is done inorder to Isolate the return current paths for these sections so that the highly switching digital logic don't interfere/disturb the analog section.

  10. amrutah
    November 20, 2013


       Thanks for an excellent post.

       You mentioned (w.r.t. the figure) that the electric lines of force may terminate on the VCC metal strip thereby causing a current flow into the VCC. Usually we will have a very good or wide Ground plane (usually 0V or near to it) metal strip, and that will form a capacitor with the VCC line.  The same switching current will then cause the electric lines from VCC metal to the ground plane thereby causing the current to return to ground?  So the final current is sunk in the ground plane.  Please let me know if I am wrong.

  11. etnapowers
    November 27, 2013

    @amrutah: thanks for your comment, this is the reason for why the designer's feedback is really important during the realization of the application board and the test board.

  12. PCR
    November 30, 2013

    Thanks Bruce for the informative post.

  13. SunitaT
    November 30, 2013

    @Bruce, thanks a lot for the post. I totally agree with you that term “ground” is probably the most misunderstood and misused term in electrical engineering. Your post definitely helps us to understand the concept of “Ground” clearly.

  14. etnapowers
    December 5, 2013

    @Ranasinghe:the post on power and analog ground is an example of the difference of theoretic design versus pratical realization. Theoretically you don't need two grounds, pratically yes, you need one ground to collect high pulsed current and one ground to be a reference to the logic signals, and you have to keep the two grounds at the same potential, by accordingly design your pcb layout. 

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