One of the very common structures you will see in motor driver circuits and switching regulators uses two power FETs, one stacked on top of the other. In operation, the upper and lower FETs take turns being on. First, the upper FET is on, and the lower FET is off. Then they switch states.
Here is the internal circuitry for the IR3870 from the data sheet from International Rectifier. This is a pretty typical buck regulator (which means the output voltage is lower than the input voltage). Keep that connection called “BOOT” in mind.
And here is the external circuitry to turn the IC into a working power supply.
The BOOT connection supplies power to the upper power FET drive circuitry. Note the Schottky diode connecting the input power to the boot pin. In the absence of any switching activity at the output, V-BOOT will equal PVCC less a diode drop (a fraction of a volt). Let's assume PVCC=5VDC, and V-BOOT is 4.5VDC.
Obviously, the FET drive circuitry for both upper and lower FETs needs power to apply a positive voltage to each FET gate at the correct time to switch them on. For the lower FET, the source connection is tied to circuit common or ground, so powering on is easy. Apply several volts to the gate, and the FET switches on hard (very low on resistance). Let's assume that, with 4VDC applied to the gate, the FET is on hard. For the upper FET, this is more difficult. If you applied 4VDC to the upper FET gate, it would start to turn on. But by turning on (conducting), its source voltage would start to rise, approaching its drain voltage. But as the source voltage approaches the gate voltage, the FET stops turning on any harder. If it's only on part of the way, power dissipation will be high. This is exactly what you don't want in a switching power supply.
Keep in mind the intent with this power supply circuit is for the upper and lower FETs to take turns switching on and off based on the PWM requirements of the power supply control circuitry elsewhere in the IC. The resulting PWM waveform at the node labeled PHASE should be a rectangular wave bouncing back and forth between 0VDC and 5VDC. This is applied to the inductor and filter capacitor to produce a (mostly) steady state DC output.
If you raise the gate voltage higher, the source will simply follow it. Since the highest voltage you have available is 5VDC, you can't turn on the upper FET enough — unless you could add a separate higher voltage source just for the purpose of driving the upper FET gate. And that is where we return to the BOOT circuitry.
By connecting one side of a small value capacitor (perhaps in the range of 0.01 to 0.1μF) to the PHASE node and the other side to the BOOT node, we can get exactly what we need. Here's what happens — and assume that, as described above, we start to turn the upper FET on a little. Also recall that the upper side of the BOOT capacitor is at 4.5VDC, thanks to that Schottky diode. As the upper FET turns on a little, the PHASE node voltage starts to rise toward 5VDC. This pushes the upper side of the BOOT capacitor correspondingly higher, raising the supply voltage to the upper FET drive circuitry. That turns the upper FET on more; the process rapidly raises the BOOT voltage to almost twice the PVCC voltage.
Since this voltage supply is based purely on the charge on the capacitor, it won't stay high very long, but it only needs to be available for perhaps tens to hundreds of microseconds. Then the whole process repeats. You will see this circuitry in many different power supplies. It allows the upper FET to turn itself on by pulling its gate up by its own bootstraps.