Running a SAR ADC at a slower throughput can be very advantageous. By providing more time between conversions, the system filter requirements are relaxed, providing more time to acquire the input signal and to retrieve data from the ADC. Since the acquisition period of the ADC is the most common area of the conversion cycle to read conversion data, a longer acquisition period will relax the requirements of the digital host. A lower-end processor with a slower master out slave in (MOSI) clock rate can be implemented. For example, the AD7980 16-bit SAR ADC is rated for a sample rate up to 1 mega-sample per second (MSPS).
The busy period of the ADC has a maximum specification of 710 ns, leaving just 290 ns to read data. To clock out 16 bits requires a clock period of no more than 18 ns (or no less than approximately 55 MHz). However, running the device at a throughput of 100 kilo-samples per second (ksps) would increase the acquisition time (data read period) from 290 ns to 9290 ns. This reduction in the ADC sample rate relaxes the serial clock requirements and changes the minimum serial clock frequency to roughly 2 MHz. On top of relaxing the digital host requirements, a longer acquisition time affords the option of using lower-power and lower-bandwidth ADC drivers due to the additional settling time provided.
As long as the ADC supports the required system continuous-time signal bandwidth, one could consider using a lower maximum throughput rated ADC, such as the AD7988-1, to save on system cost. The AD7988-1 is a 100 ksps SAR ADC from the same family of devices as the AD7980 that offers identical performance specifications at a lower price point. As seen in Figure 1, the average current draw of the device scales linearly with the sample rate because most of the current draw occurs during the active conversion period. If the conversion process happens less often, then less current is consumed. The AD7980 at 100 ksps (or the AD7988-1) consumes approximately 1/10th of the current that the AD7980 would while sampling at 1 MSPS.
As well as the single-channel, 16-bit pseudo-differential AD7980, the ADI portfolio also offers the AD7902. This is a two-channel, 16-bit pseudo-differential simultaneous sampling SAR ADC that is rated for 1 MSPS. A simultaneous sampling system could be utilized to extract signal phase information in applications such as time of flight. Lab results were collected for the AD7902 sampling a 10 kHz tone at both 1 MSPS and 15.625 ksps (1/64th of 1 MSPS). Using Equation 4, the fundamental of the undersampled 10 kHz tone should appear in the DFT bin that covers 5.625 kHz. It can be seen that no amplitude information is lost between the sampling that meets the nyquist criterion and the undersampled configuration. However, the reconstructed signal would be an aliased first nyquist zone representation of the original continuous-time input.
Another example of where undersampling can be advantageous is multi-channel sequentially sampling data acquisition systems. These systems typically consist of a SAR ADC with a multiplexed analog front end that is converted in a known sequence at fixed intervals. In such a system, the effective sample rate of each channel is reduced as a function of the number of channels enabled in the system. For example, in an eight-channel system with the SAR ADC running at 1 MSPS, each respective channel is represented by every eighth sample. Therefore, the sample rate of a given channel is only 1/8th of 1 MSPS (125 ksps). One can see how the nyquist frequency of an individual channel can quickly be reduced in a multiplexed sequentially sampling system.
Analog Devices offers the AD7091R-8, an ultra-low-power 12-bit, eight-channel 1 MSPS SAR ADC that features an internal reference and a user programmable channel sequencer. The device is housed in a tiny 4 mm x 4 mm LFCSP package and is guaranteed to consume no greater than 1.7 mW at a three-volt supply and sampling at 1 MSPS. On the AD7091R-8, if all eight channels are enabled, then the device will automatically sequence repeatedly through the channels from channel 0 to channel 7. With the ADC running at 1 MSPS, each channel will be sampled at 125 ksps. Therefore, the nyquist frequency of a given channel has been reduced relative to a 1 MSPS single-channel system from 500 kHz to 62.5 kHz. Monitoring a 75 kHz tone on one of the multiplexer channels will produce an aliased representation of the continuous-time signal with a fundamental frequency of 50 kHz. As can be seen in the subsequent figures, no dynamic performance degradation is observed when the nyquist criterion is modified by enabling additional channels on the AD7091R-8.
This article has presented the idea that there are applications outside of communication systems that can utilize the theory of undersampling. This could include RMS-to-DC conversion, AC strain gauges, time of flight, ultrasonic level measurement, and multiplexed sampling. Implementing an undersampled system with SAR ADCs can generate tremendous performance and power advantages. The overall system constraints can be relaxed while still accomplishing the overall goals of the circuit.