Since most engineers went through intensive course work in engineering school studying the analog-to-digital converter (ADC), operational amplifier (op amp), digital-to-analog converter (DAC) and other electronic architectures, you would think the basic functions of those circuits would be understood. Most of us have a good understanding of how an ADC works, but are less familiar with its counterpart, the DAC, and how it really functions.
Still, for most of us, a DAC is mainly a black box where digital data goes in and a representative analog signal comes out. Only a few know the differences in architecture and comparative advantages and disadvantages of the “string” architecture versus the “R2R” ladder. Knowing the differences and how those general-purpose DACs work enables the designer to choose the best DAC for the application. This article will shed some light on the basic operation of DACs and will give some answers to questions you always wanted to know.
Although the DAC is seen mainly as a black box where digital data goes in and a representative analog signal comes out, there is much more to it. The digital data can be either in a serial or parallel data format. Interfaces such as SPI or I2 C, which transmit the digital data stream serially, are like a necklace or chain into the “black box,” whereas the parallel interface loads all necessary bits in one clock cycle into the device. On the other side of the device, the analog output signal is either a voltage or a current, Figure 1 .
Figure 1: Principal function of a Digital-to-Analog Converter
The different input interfaces offer variation in the form of the data format and, therefore, in speed, pin count, chip area, device size, and flexibility. However, both serial and parallel interfaces will get the digital data into the device.
Once the digital data is within the black box (first block), an input register takes care of operations such as the serial-to-parallel conversion, or in multi-channel devices stores the data until it is transferred to the individual DAC registers. The DAC register, which is the connection between the input register and the DAC architecture, acts like a memory and stores the digital data.
In the first days of DAC design, this DAC register was an external memory block which held the digital data. Without the DAC register, the output of the DAC would change immediately with any changes on the external input bus, due to the real-time feeding of the analog circuitry. The data stays in the DAC register until the user decides to update the DAC register with new code. The DAC register essentially acts like a flip-flop.
Figure 2: Basic functional blocks
There are two principle architectures used in today's precision DACs, the R2R and string. Both architectures are analog circuits with some digital control logic. With a basic R2R architecture, it is possible to either generate a current output or a voltage output. String architectures can only generate voltage outputs by using an output buffer, which is shown as the output circuit box in Figure 2 . There is no output buffer implemented in the case of a current output.
The string architecture
The string architecture is as the name implies, a series of resistors placed in series to build a string. In theory, you would need 256 resistors to build an 8-bit DAC (28 = 256). Figure 3 shows a string architecture, including the internal output buffer generating a voltage output which is equivalent to the digital input code.
Figure 3: Principal string architecture with voltage output
Increasing the resolution means also increasing the number of resistors needed to build a string DAC. For a 16-bit DAC, one would need a total of 65,536 resistors to generate all the possible voltages/digital steps. However, in the real world of design it is impractical to implement nearly 66 thousand resistors on a single chip, especially with today's requirements of small packages, low power dissipation, and low cost.
Hence, designers came up with additional smaller circuitry such as interpolating amplifiers that reduce the necessary amount of resistors, and tapping points on the resistor string, allowing a more power-efficient and less space-consuming design. The interpolating amplifier is used as an output buffer. Some of today's string architectures have a pin available for the amplifier's external feedback loop.
Advantages of string DACs are low cost and guaranteed monotonicity due to the string architecture. Also important, it offers low power and small die area, which allow for small packages, making them desirable in portable applications. Another advantage is that the output buffer is already included, which eliminates the need for an additional external component on the board.
Secondly, the output buffer isolates internal resistors and analog circuitry from the outside world. This is quite helpful in low-impedance circuitry. Many applications require low-glitch energy, which is another benefit of string architecture.
On the other hand, due to the higher impedance of the string design, the noise is generally higher than in R2R architectures. Designers also need to be aware of the limited accuracy, also called integral nonlinearity (INL). Older designs typically have INL numbers in the mid-60 least significant bit (LSB) range. Newer designs take advantage of improved process technology and offer now typical INL numbers in the 4 LSB area. For many closed-loop applications such as motor control or process control, a typical INL of 4 LSB is more than sufficient. However, for other applications such as automatic test equipment, this is not good enough. Those applications require INL of 1 LSB and, therefore, a different architecture: the R2R.
The R2R architecture
The R2R architecture principally consists of resistors being placed in parallel as a resistor ladder. Figure 4 shows one possible R2R ladder, a multiplying DAC (MDAC) where the top of the R2R ladder is connected to the external reference voltage. This architecture outputs a current equivalent to the digital input code.
Figure 4: Principal R2R architecture with current output
Another way of implementing an R2R ladder in silicon is shown in Figure 5 .
Figure 5: Principal R2R architecture with voltage output
The external reference voltage is not directly connected to the R2R ladder. Depending on the digital input code, switches will connect the reference voltage or the ground level, via the R2R network, to the output buffer, which transforms the generated voltage signal into the output voltage.
The architecture shown in Figure 5 allows only unipolar output voltages from 0 V to the applied external reference voltage (note: that the supply voltage of the DAC must be equal to or higher than the reference voltage). By modifying the latter architecture by connecting the ground level to an additional, external negative reference voltage, bipolar operation can be achieved.
Figure 6 shows the modified architecture.
Figure 6: Principal bipolar R2R architecture
This type of architecture also can be used for choosing flexible reference voltages. VREFL can be a negative voltage, but does not need to be. However, VREFL must be smaller than VREFH . Detailed descriptions and values can be found in existing datasheets of devices such as the DAC7714 (Reference 1 ).
Advantages of R2R DACs are lower noise and higher accuracy. Excellent accuracy of ±1 LSB INL and DNL are possible. Moreover, this architecture can achieve high-voltage outputs and multiplying DACs (MDACs) can have fast settling time (less than 0.3 µsec) with a multiplying bandwidth that can be greater than 10 MHz. Generally, other R2R topologies have only medium settling-time capability.
The MDAC's flexibility in using an external output buffer of the designer's choice makes this architecture type interesting for a wide range of applications such as digitally controlled calibration or industrial programmable-logic control (PLC). The designer can pick and choose the best operational amplifier for the given application. On the other hand, an external buffer is needed for low-impedance connections, thus increasing the number of devices on the board. Secondly, the glitch energy is greater for an R2R architecture than for a string architecture, making R2R DACs less attractive for waveform generation and other glitch-sensitive applications.
Other electrical specifications such as gain error or offset error need to be considered, but also drift over temperature or full-scale error are important parameters. Those are usually independent from the specific architecture. To get a good start, a designer should first look into the basic requirements and ask what minimum resolution and linearity is required. In case of a closed-loop application, a lower cost and less linear string DAC architecture will do the job, while in open-loop applications an R2R architecture does a better job offering better linearity and, hence, higher accuracy.
1. DAC7741 datasheet by Texas Instruments, www.ti.com/sc/device/dac7714
2. Amplifier and Data Converter Selection Guide (Rev. B) by Texas Instruments, focus.ti.com/lit/ml/slyb115b/slyb115b.pdf
3. Digital-to-Analog Converter Product Portfolio by Texas Instruments; www.ti.com/dataconverters
About the Author
Georg Haubner is a strategic marketing and systems engineer at Texas Instruments Incorporated, focusing currently on product definition of digital-to-analog converters. He received his MSEE from the University of Applied Sciences in Munich, Germany, and holds an MBA from the University of Arizona.