If you are making product selection decisions in an analog circuit, you can get through the process quickly by selecting the best performing parts on the market for each socket. The confident feeling that you get from this type of approach can give you the sense of security that your circuit will work as expected without a redesign.

However, hunches only go so far when you try to justify products in your application circuit, particularly when you look at the bottom line price on your bill of materials (BOM). So, is it an appropriate fit to put the highest-performance analog products before the A/D converter (ADC)?

You can eliminate most electronics and sensor errors by using calibration in the digital domain. However, these techniques will never recover the codes that are lost in the lower and upper regions of the ADC transfer function. These lost codes, in single-supply application circuits, are a product of offset, gain, rail-to-rail swings, and noise errors near ground and the positive power supply. If the OEM designer does not account for device variations, these errors appear as yield losses from lot to lot. For simplicity in this discussion, we will only evaluate the effects of offset errors of the various components in the circuit.

In this article we discuss two tools that you can use to estimate the level of uncertainty with the product selection of components in your circuits: root-sum-square (RSS) and extreme value analysis (EVA). The RSS tool will help quantify your decision with the product selection of the parts in your signal chain so that you choose the appropriate devices for your circuit. The EVA tool, the more conservative approach, will assess the worst-case effects of the performance specifications of the devices in the circuit. Both of these tools will help quantify your decision with the product you have selected as part of your signal chain so that you select the appropriate devices for your circuit in terms of performance and cost.

The bridge-sensor circuit of **Figure 1** is designed to sense a maximum weight of ±896 gm (±2 lb) with an accuracy of 1.0 gm.

* Figure 1: Figure 1. This load cell circuit illustrates the RSS and EVA calculations when determining the dynamic range of this system. The specifications for this system are in the upper left corner of this figure. *

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The second-order low-pass filter reduces system noise and insures a system bandwidth of 10 Hz. The load cell (LCL-816G, Omega) output voltage response is a nominal 2 mV/V. With a 5V reference at the top of the load cell, the load cell range to the input of the instrumentation amplifier (INA326, Texas Instruments) is ±10 mV.

This voltage is amplified through the INA326 and filtered with a second-order low-pass filter, which uses the OPA350 CMOS op amp (Texas Instruments). The ADS7841, a quad-channel, 12-bit successive approximation register (SAR) ADC from Texas Instruments receives the filtered signal and digitizes the signal, achieving an overall accuracy of 1.0 gm.

There are several fundamental areas of concern, such as dynamic range, accuracy, temperature, manufacturing processes, when you select the sensor, instrumentation amplifier, filter amplifier and ADC. You determine the maximum dynamic range by selecting the right number of bits for your ADC and then assess the range limitations of the various devices in the circuit. The performance of the ADC in the circuit usually determines the optimum dynamic range of the system. The primary characteristics that affect the converter's dynamic range are the resolution (or number of bits) and ADC accuracy. The ADC offset, gain, INL and DNL performance define the accuracy of the converter.

You can digitally calibrate system offset and gain errors in the mid-range of the conversion, and also calibrate the system's outer regions in the analog domain. The example in this article will focus on how to deal with the outer-region offset errors of the devices in the system, at both rails. Although this discussion is limited to room-temperature offset errors, you can extend the techniques to include gain errors, rail-to-rail amplifier input/output limitations, and noise errors.

In a signal-conditioning circuit, the sensor itself can have a significant impact of the system's dynamic range and overshadow the converter's impact. For instance, the sensor's offset error is ±0.3 mV/V (maximum). This error is multiplied by the INA326's gain of +245 V/V before it reaches the input of the ADC. You determine the dynamic range of the system by assessing the number of usable bits from the converter as well as the errors, such as offset, from the analog signal chain before the converter. The potential offset error of the ADC and the analog signal path limit the dynamic range nearest the power supply voltages and ground, **Figure 2** .

* Figure 2: Figure 2. The dynamic range of a system spans from the lowest voltage above the negative rail of the power supply to the highest voltage below the positive supply. The device specifications that can limit this range are offset, gain, noise and rail-to-rail in/out swing capabilities.*

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The system designer will find the primary device information in the IC manufacturer's product data sheet. The manufacturer may provide more information on request, but the first-pass feasibility exercise starts with this documentation. In our evaluation we will use two types of device errors: typical and min/max.

The maximum specifications usually encompass a normal distribution population that is statistically two to five sigma above the typical specification. If there is sorting and/or grading-out of a particular device, this may not be the case, and the population of the device may not fit under a Gaussian curve. Examine the data sheet for these types of situations and exercise engineering judgment, by inserting appropriate “fudge factors” in your calculations. **Table 1** lists the typical and max/min specifications of the components in the circuit in Figure 1.

*Table 1. Typical, maximum, and minimum data sheet specifications for components shown in Figure 1. *

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**Use RSS for evaluation**

When you determine the feasibility of the products in your application circuit, you can use the RSS calculation with the maximums from the product data sheet. The specifications that you combine during this calculation must be uncorrelated to each other or statistically independent. For example, a potential specification error such as offset from part to part can combine to determine the outer dynamic-range limitations of an application circuit, as long as their variations over temperature or power supply do not track each other.

With the RSS calculation technique, the first task is to calculate these errors to a single node in the circuit. If you exercise engineering judgment, you can accept or adjust the maximum values. For instance, if a product that you have selected for your circuit has one or more grade-outs, the population will not fit into a normal distribution. Under these conditions you may want to increase a maximum value. Once this is done with every component in the signal chain, calculate the square-root-of-the-sum-of the squares of the maximum values. Next, calculate the RSS value to determine the dynamic range or rail-to-rail swing capability of the circuit.

For instance, in Figure 1 the maximum offset error of the load cell is ±0.3 mV/V. Since the excitation voltage at the top of the load cell is 5 V, the maximum offset error at the differential output of the load cell is ±1.5 mV. After the gain (+245 V/V) of the in-amplifier and filtering by the two-pole low-pass filter (with the OPA350), the maximum DC-offset error of the load cell at the input of the ADC is ±368 mV, **Table 2** .

* Table 2. This table tabulates typical and maximum performance specifications of voltage offset and gain for the devices in Figure 1. *

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In this example, you also bring the in-amplifier errors to the input of the ADC with the same type of calculations. The typical and maximum offset error of the INA326 is 20 µV and 100 µV, inclusive. These instrumentation amplifier errors at the input of the A/D converter are 4.9 mV (typical) and 24.5 mV (maximum). Table 2 shows these calculation results, along with the results from the other components in this circuit.

As seen in Table 2, the RSS value at the negative rail (or ground) and positive supply rail of the circuit is 369 mV. This calculation shows that the head-room is reduced by 369 mV near either of the rails. The ideal dynamic range of the ADS7841 12-bit converter is 5 V. The total possible reduction in the dynamic range, seen in Figure 2, is equal to (V_{ERR-P} + V_{ERR-G} ) = (369 mV + 369 mV) or 738 mV. This reduces the dynamic range of the system to 4262 mV, about 85 percent of ideal. This calculation estimates what “worst-case” response of the system using RSS techniques.

**Using EVA for component selection**

When the calculation is performed using only the maximum values on the data sheet, this calculation is referred to as Extreme Value Analysis (EVA). An EVA analysis assumes that all components are always at their worst-case tolerance. If this were the case, most manufacturers would have a difficult time shipping products cost effectively. Manufacturers always want to specify a maximum value that allows them to ship product at a cost-effective price point. Generally, but not always, yields less than three-sigma are extremely unsatisfactory.

With a yield of three-sigma for a given parameter, the probability of a part being near or at the specification limit is approximately three out of a 1000. In a circuit, the probability of having two devices near the specification limit is that factor squared, or approximately one out of a million.

In our example in Figure 1, the summed maximum offset error of the components in the signal chain is equal to 396 mV (see Table 2). The estimated dynamic range, taking only the offset errors at room temperature into consideration and given the EVA calculations is equal to (V_{ERR-P} + V_{ERR-G} ) = (396 mV + 396 mV) or 792 mV.

This magnitude of possible error reduces the dynamic range by about 84.2%. If the offset errors of the instrumentation amplifier, filter amplifier, or ADC were higher and closer to the load-cell's offset error, the estimated dynamic range of the system would decrease dramatically. With this type of calculation, statistically, there are almost no anticipated failures.

**Picking RSS versus EVA**

Manufacturers list maximum specifications on their datasheets. Unfortunately, little is known beyond the limits written there. Generally speaking, most manufacturers choose maximum limits in order to assure a reasonable yield. Engineers often use the maximum limit of the given parameters to calculate the worst-case performance of the circuit. There is an assumption in these calculations that the parameter of interest is statistically independent and the manufacturer is testing 100 percent of the devices on their production floor. We can also assume that the manufacturer is removing parts that exceed their stated maximum limits.

The RSS calculation will provide a good estimate that is better than just relying on the data sheet specifications for each individual device in the circuit. It combines non-correlated specifications in an attempt to estimate worst-case results. During the initial product-selection attempt, you can use RSS calculations. This calculation will assist you in making logical, economical product selection decisions. The EVA calculation is a more conservative evaluation that may provide a more reliable system, but also a more costly one, because you will be using higher-performance products in your circuit.

But a final word of caution: once you take this first step in product selection, make sure that you use the same evaluation technique to quantify the effects of the processes that you impose on these devices in your manufacturing process (such as solder reflow) and the end-of-life effects due to environmental exposure.

**References**

1. “A Comparison of Tolerance Analysis Methods, “Steven M. Sandler, AEi Systems, LLC

2. “Tolerance Analysis of Electronic Circuits using Mathcad,” Robert Boyd, ISBN 08493223398

**About the authors**

*Bonnie C. Baker* * is a Senior Applications Engineer for Texas Instruments and has been involved with analog and digital designs and systems for nearly 20 years. In addition to her fascination with circuit design, Bonnie has a drive to share her knowledge and experience and has written well over 250 articles, design notes, and application notes. Bonnie is the author of “A Baker's Dozen: Real Analog Solutions for Digital Designers.” You can reach her at ti_bonniebaker@list.ti.com. *

** Brad Nielsen ** is an Analog and Power Applications engineer at Texas Instruments. He has designed power supplies with planar magnetics for both commercial aircraft and U.S. military satellites. Nielsen also brought to market a 10-bit, 70 MHz ADC and performed analysis to support yield calculations. Brad is at ti_bradnelson@list.ti.com.

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