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Voltage References Can Bite You, Too

Q . Why does my voltage reference have nowhere near the accuracy guaranteed on the data sheet?

A . Because you're being unkind to it. If you're unkind to a voltage reference it will bite you.

There are three common unkindnesses which can cause your problem. Insufficient headroom, incorrect loading, and reversed output current. The first two are usually mentioned on the data sheet and should be easy to avoid, but the third is rarely mentioned and causes problems which may be hard to diagnose.

Most voltage references have input, output and ground terminals – the output terminal is maintained at a precise voltage above ground for a wide range of input voltages and load currents. But if the difference between the input and output voltage is too small the output voltage precision is degraded. Some devices actually specify this – full accuracy is maintained above supply voltage X, while proper operation, but lower accuracy, occurs above supply voltage X – but more devices define the range of supplies for full performance but do actually work, but not so well, at slightly lower voltages. It is essential to work in the full precision region to obtain the specified accuracy, but it is well to understand that a reduced supply may cause reduced accuracy, and to check the supply if your reference is inaccurate.

Most voltage references have current-limited outputs so that they will not be damaged by short-circuits. If called upon to deliver too much current their output voltage will drop – and the effect will start well below the point at which the device goes into full current limiting. Check the data sheet both for maximum load current, and for the output current at which the accuracy starts to fall (this is often on a graph).

Another way of loading a voltage reference incorrectly is to use incorrect capacitive loading – many, or even most, voltage references are stable with any capacitive load but some, especially some low drop-out (LDO1 ) types, may oscillate with too much or too little load capacitance (or even with either!) If this happens the output voltage will cease to be correctly regulated. RTFDS2 or experiment to ensure that the range of capacitance a voltage reference encounters in your application does not cause such oscillation – and remember that in a complex system several sub-systems may share a reference, and you may not be responsible for designing all of them.

I was bitten by the third problem myself a few weeks ago. I was designing two very simple low-power battery management systems, the equations defining the resistors in the voltage sensing part of the systems were simple, but when I built them neither worked at anywhere near the correct voltage. (See my EDN article entitled Two simple secondary battery circuits.)

It took me a couple of days before I realised that the voltage reference in both of these devices were driving the non-inverting input of an op-amp with positive feedback configured as a comparator3 with defined hysteresis. When the op-amp output was high the feedback resistor was driving about 4μA back into the voltage reference output.

I was using ADR291 and ADR292 references and the “simplified schematic” on their data sheet showed the output being driven by an op-amp-like structure. Op-amps can both source and sink current at their outputs and I had sub-consciously assumed that these references would, too. Not so! A reverse current of under 2 μ A is enough to send the output voltage much higher.

The data sheet gives no explicit warning of the problem at all. Load regulation is defined with output currents of 0-5mA, which suggests that large reverse currents (tens or hundreds of μA!) might present a problem but there is nothing to suggest that very small reverse currents might not safely flow in the resistor chain R1, R2 & R3 shown on the simplified schematic.

Once you are aware of this problem it is easily avoided. Many voltage references will sink as well as source current and if the data sheet defines the output voltage for output currents of ±XmA then you may be sure that this is so. Alternatively, if you know that current will flow into the reference output terminal then ground that terminal with a resistor small enough to sink whatever current you expect. This ensures that the current in the reference output is always out of the device and the problem is solved.

Our guest Author, the esteemed James Bryant

James Bryant [james@jbryant.eu] has been a European applications manager with Analog Devices since 1982. He holds a degree in physics and philosophy from the University of Leeds. He is also C.Eng., Eur. Eng., MIEE, and an FBIS. In addition to his passion for engineering, James is a radio ham and holds the call sign G4CLF.

1 A low drop-out reference (or linear regulator) is one which uses an output stage that allows the input voltage to go very close (a few hundred mV or even less) to the regulated output voltage without loss of output voltage accuracy.

2 RTFDS = Read The Friendly Data Sheet.

3 Be careful when using op-amps as comparators, there are potential problems which are described in (RAQ11 and its expansion). The op-amps I used in both these designs were carefully chosen to avoid such problems.

5 comments on “Voltage References Can Bite You, Too

  1. GSKrasle
    August 7, 2015

    Hmmm,

    This is similar to a very hard lesson learned a while back. The ASIC had a low-voltage LDO that served as a bias supply somewhere, and also as the termination of some IO cells' ESD structures. It came-out on one pin, intended to connect only to a capacitor.

    Well, for convenience, that pin ended-up also with some high-value pull-ups to an I2C bus, just to keep that bus' IO cells from EMC-ing when the accessory wasn't connected.

    The accessory had a higher IO voltage than that LDO.

    Nobody noticed any problems on the schematic, but a lot of systems started malfunctioning in weird, seemingly unrelated ways. The crystal oscillator would break, some analog circuits deep inside would break, things like that.

    I was asked to look at the problem.

    I noticed that the oscillator's IO cells were in the domain of this LDO output rail, and when I looked at the LDO voltage, I could see that it was apparently a little perturbed by traffic on the I2C bus, but, looking with a scope I could see that it was REALLY getting jerked-around. The minute/minuscule/zero normal load current and the relatively small bypass capacitor allowed it to be driven sometimes to that other rail's voltage, much in excess of its rating and the rating of the circuitry it was connected to.

    In retrospect, the design had TWO errors: 1) the LDO rail should not have been used as an I/O cell high-side termination unless it had the ability to sink current or safely dissipate ESD somewhere besides its external capacitor. This was a mistake in the ASIC design. 2) the LDO rail should not have been used as a bias source externally without accounting for its inability to sink current.

     

  2. Steve Taranovich
    August 7, 2015

    @GSKrasle—Great information! There are too many articles about how to do it right, but not enough that reveal some of the pitfalls that can befuddle a designer. Thanks for that.

  3. krishnabharat78
    August 11, 2015

    good post

  4. Doug Grant
    August 12, 2015

    To paraphrase Paul Brokaw's comment on references: “There is only one specification for a voltage reference and that's the output voltage. The data sheet is a list of excuses for why the specification is not met.”

  5. JuliaNorma
    August 27, 2015

    Agreed. Learned alot from that haha, high voltage …

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