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What Are the Limits to Integration?

Some of us older engineers have been patiently waiting for decades for Moore's Law to expire, but a question arises as to whether there are any more general fundamental limits to electronics integration. Moore's Law has some distance to go yet, though it is not that far on a logarithmic scale. A decade or two more of transistor shrinkage, and we will all be reading books on the Schroedinger equation and watching tutorials on ballistic transistors.

Even now, lithographic methods suffer from the diffraction of electromagnetic waves at increasingly shorter wavelengths. IC masks must be pre-compensated geometrically with weird-looking patterns that IC designers refer to as ornamentation. For sub-100nm unit design lengths, IC processing must be increasingly integrated with circuit design. Very small transistors do not exactly behave like tiny 2N3904s. The Ebers-Moll 3 or Gummel-Poon BJT models and their MOSFET equivalents no longer accurately account for all that is going on.

Actually, the limits posed by quantum phenomena might not be the show stopper for circuit size reduction. When IC interconnections shrink down to where there is almost nothing left of them to conduct current, electron momentum begins to affect the structure of the traces. A trace that flows like a waterfall over an oxide step in a planar process is literally flowing, urged on by moving electrons, until the trace opens. Reliability reduction from metal migration, not quantum mechanics, might set the limit.

This limit is already being reached. It began to have an impact a decade ago, when the smallest-geometry processes were specified with a mean time between failures (MTBF) of less than a decade. Now, at least one company has a three-year process. Would you buy a laptop computer knowing that the MTBF of the microprocessor is three years?

Suppose some comfortable limit near the far end of the line of Moore's Law is reached (by whatever cause) in the not-too-distant future. At however many nanometers that might be, ICs will be able to have millions of transistors per chip. Digital computer engineers certainly know what to do with an ever-increasing number of transistors (providing they can be cooled), but what would analog circuits comprising 10 million transistors do?

For analog, there is a conceptual gap whereby circuit integration capabilities far surpass the imaginations of analog engineers thus far. (Or maybe not, but that will be the topic of a subsequent article.) ADCs and DACs can have only so many bits before reaching other quantum limits imposed by noise. A putative 18-bit flash (parallel) ADC has 218 ≈ 1/4 million discrete voltage steps. Implementing that could require more than a million transistors.

Analog front ends of medical ultrasound and MRI scanning devices are repetitive and are among the present front runners for large integration. Analog-intensive devices that have yet to be integrated more thoroughly, such as measurement instruments, are also candidates. Exar, Intersil, and Maxim integrated function generators (or at least most of their subsystems) on a chip and DVMs or DPMs (digital panel meters) such as those from Intersil or Maxim are commonplace, but where are the gain-phase analyzers, or even Z-meters, on a chip?

The limitations of analog integration do not end with monolithic circuits. There is still the older integration problem of packaging. With the advent of surface-mount components, it is possible to approach the goal of a single-board product, but the limits for board integration include modular functional decomposition for versatility, style, and appearance of the product, along with the fact that front panels are usually not planar with circuit boards.

What is the fundamental system-level limitation? It is probably the human-machine interface. It might seem silly at first, but some imaginative people are integrating electronics into clothing (and not merely as RFID tags). The other day, my EE nephew told me he was working on gang programming of microcontrollers in cigarettes (I am not making this up).

Perhaps the biggest challenge (and the hardest to articulate) is the integration of analog electronics itself into the wider world. And perhaps the largest obstacle in this challenge, like that of the million-transistor analog circuit, is mostly conceptual.

7 comments on “What Are the Limits to Integration?

  1. bjcoppa
    May 9, 2013

    The advanced high-performance branch of the semiconductor industry is moving towards 3D transistors rather than 2D, planar as is common today which will help extend scaling in a different way. One should not be overly concerned with Moore's Law limit as companies are finding creative ways to enhanced chip density per wafer with 3D NAND and 3D logic architectures. In addition, chip stacking is an emerging trend for advanced packaging utilizing through-silicon metal vias to link multiple chips in a single package. This technology applies to analog ICs as well.

  2. Davidled
    May 9, 2013

    More analog circuit is required as more functional increased inside chip. IC is highly fabricated by CMOS and SiGe BiCMOS technology as one of methods. Plus, Chip is very visible under Micrograph.  Package size of IC could be increased if facing the limitation. I am not sure whether or there is a major limitation to integration.

  3. Brad Albing
    May 14, 2013

    Any reference info that you can direct me to that gives more details of the 3D ICs and transistors?

  4. Brad Albing
    May 14, 2013

    DaeJ – are you suggesting a processhat will combine CMOS & BiCMOS with SiGe technology?

    For the size of the IC, if it gets too large, it will be in danger of breaking if the PC board is flexed. Of course, you could use stronger packaging material, but that will increase the cost.

  5. Davidled
    May 14, 2013

    BiCMOS with SiGe is used commonly for wireless board requiring the fast response among base, emitter and collector. BiCMOS with SiGe tech is used for analog IC design including I/Q baseband, FSK modulation and synthesizer.  Fabrication process is slightly different between two processes. Secondly, generally speaking, better performance/quality need to get more cost. It is indispensable to use extra material  to meet the switching response time for this application.

  6. Brad Albing
    May 14, 2013

    OK – I'm not very familiar with SiGe characteristics, so thanks for the info.

  7. WKetel
    May 15, 2013

    The limits on analog integration into digital systems are partly based on the condition that analog signals are more normally connected to the real world, where voltages and power levels are much larger. But the very biggest limitation will undoubtedly be the noise generated by the smallness of the connections. A point is reached where the noise becomes large enough to get in the way of whatever was supposed to be happening with the desired signal. 

    The other reason is that analog design engineers don't just toss more gates or code at a challenge, they actually need to do real engineering, instead of just piling on more lines of code. That's not a slam, just a fact. nobody would ever design even a thousand transistor analog system, let alone a million opamp system. That is just not how the analog domain works.

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